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d-Matrix's Raptor 3D DRAM Achieves SRAM-Class Bandwidth at 1/10th the HBM Power by Dropping PHY & Fusing DRAM Beneath the Compute
d-Matrix has launched its Raptor 3D DRAM technology, which is positioned as a solution to the limitations of current memory technologies used in AI. By utilizing a stacked design that places logic atop DRAM, this system aims to deliver SRAM-level bandwidth at a fraction of HBM's energy cost. The Raptor DRAM achieves over 100 TB/s bandwidth while consuming only 0.37 pJ/bit. This advancement is particularly relevant as AI models continue to grow and demand more efficient memory solutions. Raptor's architecture allows for better thermal management and lower energy use than existing technologies, thus providing a critical pathway for future inference accelerators in machine learning and AI applications.
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Published 23 Aug 2026, 22:20 UTC5 min read
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Summary
TL;DR
- Raptor 3D DRAM offers over 100 TB/s bandwidth at 0.37 pJ/bit.
- Claims to achieve SRAM-class performance with significantly lower power.
- Addressing limitations of current HBM solutions for AI workloads.
- Utilizes a cost-effective TSMC 4nm process for integration.
- Designed to improve efficiency and thermal performance in memory-heavy applications.
Interesting facts
- 3D DRAM aims to combine the best of SRAM and HBM technologies.
- Significantly reduces energy consumption to 1/10th that of HBM.
- Adopts innovative stacking techniques to address thermal challenges in high-density applications.