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Intel EMIB-T Breaks Past Existing AI & HPC Scaling Limits, Enabling Ultra-Large Die Complexes With Over 10x Reticle Dies & 12 Gb/s+ HBM4e DRAM
Intel has introduced its EMIB-T technology which enables the creation of ultra-large die complexes, facilitating the integration of over 10x reticle dies and supporting bandwidths over 12 Gb/s for HBM4e DRAM. This breakthrough addresses the scaling challenges in high-performance computing (HPC) and artificial intelligence (AI) domains, thereby enhancing computational efficiency and lowering costs in chip manufacturing. Showcased at IEEE ECTC 2026, this advancement is positioned to attract diverse customers in the industry by offering superior capabilities over competitor solutions.
MonitorConfidence: HighShort term horizon
Published 10 Jul 2026, 18:20 UTC8 min read
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Summary
TL;DR
- EMIB-T enables hosting of over 9x reticles on a single package.
- Supports 12 Gb/s bandwidth for HBM4e DRAM.
- Facilitates the disaggregation of large systems into chiplets.
- Demonstrates advantages over traditional packaging methods.
- Scalable architecture catering to evolving AI and HPC demands.
Interesting facts
- EMIB-T integrates fine-pitch interconnects with through-silicon vias.
- The technology supports both high-density and lower energy designs.
- Intel plans to expand scalability to >12x reticle size by 2028.