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DigiTimes
MediaTek denies Intel link as TSMC's packaging lead faces new test
MediaTek issued a statement denying allegations that its recruitment of former TSMC executive Douglas Yu was intended to help Intel's advanced packaging business, specifically for Google's second-generation TPU. DIGITIMES senior analyst Luke Lin provided detailed analysis comparing TSMC's CoWoS-L and Intel's EMIB-T technologies. He noted that while Intel's EMIB-T yield has reportedly reached 90%, that level is still insufficient for high-end AI packaging, where TSMC's CoWoS-L yield is expected to exceed 98% in 2026. The cost implications are significant: if Intel damages costly wafers from TSMC, losses could outweigh packaging fees. Google has not fully committed to Intel for its next TPU. Lin also highlighted that TSMC's foundry capacity is strained, and the company is likely to raise prices more aggressively in 2027, reflecting its increasing bargaining power.
MonitorConfidence: MediumShort term horizonExecution risk: High
Published 11 May 2026, 06:20 UTC2 min read
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Summary
TL;DR
- MediaTek denies allegations it is using former TSMC talent to aid Intel packaging.
- Intel EMIB-T yield reported at 90%, but analyst says insufficient for AI chips.
- TSMC CoWoS-L yield expected to exceed 98% in 2026.
- Google remains undecided on second-gen TPU packaging supplier.
- TSMC capacity utilization exceeds 100%, limiting iPhone supply.
- TSMC likely to raise foundry prices significantly by 2027.
- Analyst warns that Intel handling costly TSMC wafers risks losses exceeding packaging fees.
Interesting facts
- The analyst frames Intel's 90% yield as economically risky: one in ten units fails, and each failure wastes expensive logic wafers and HBM memory.